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PD54008L-E
RF power transistors The LdmoST Plastic family
Features

Excellent thermal stability Common source configuration Broadband performances POUT = 8W with 15 dB gain @ 500MHz New leadless plastic package EDS protection Supplied in tape & reel of 3K units In compliance with the 2002/93/EC european directive PowerFLATTM (5x5)
Description
The PD54008L-E is a common source N-Channel, enhancement-mode lateral FieldEffect RF power transistor. It is designed for high gain, broad band commercial and industrial applications. It operates at 7 V in common source mode at frequencies of up to 1 GHz. PD54008L-E boasts the excellent gain, linearity and reliability of STH1LV latest LDMOS technology mounted in the innovative leadless SMD plastic package, PowerFLATTM. PD54008L-E's superior linearity performance makes it an ideal solution for portable radio.
Pin connection
Top view
Order codes
Part Number PD54008L-E Marking 54008 Package PowerFLAT (5x5) Packaging Tape & Reel
January 2007
Rev 2
1/15
www.st.com 15
PD54008L-E
Contents
1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 1.2 1.3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 3
Impedances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Typical performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Typical performance (Broadband) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 5 6
Test circuit schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
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PD54008L-E
Electrical data
1
1.1
Electrical data
Maximum ratings
Table 1.
Symbol V(BR)DSS VGS ID PDISS TJ TSTG Drain source voltage Gate-source voltage Drain current Power dissipation (tCASE = 70C) Maximum operating junction temperature Storage temperature
Absolute maximum ratings (TCASE = 25C)
Parameter Value 25 -0.5 to +15 5 26.7 150 -65 to +150 Unit V V A W C C
1.2
Thermal data
Table 2.
Symbol RthJC
Thermal data
Parameter Junction to case thermal resistance Value 3 Unit C/W
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Electrical data
PD54008L-E
1.3
Electrical characteristics
Table 3.
Symbol IDSS IGSS VGS(Q) VDS(ON) CISS COSS CRSS VGS = 0V VGS = 5V VDS = 10V VGS = 10V VGS = 0V VGS = 0V VGS = 0V
Static (TCASE = 25C)
Test conditions VDS = 25V VDS = 0V ID = 50mA ID = 0.5A VDS = 7.5V VDS = 7.5V VDS = 7.5V f = 1MHz f = 1MHz f = 1MHz 2.0 0.09 80 60 6.6 Min Typ Max 1 1 5.0 Unit A A V V pF pF pF
Table 4.
Symbol P1dB GPS D Load Mismatch
Dynamic
Test conditions VDD = 7.5 V VDD = 7.5 V VDD = 7.5 V VDD = 7.5 V IDQ = 200 mA IDQ = 200 mA POUT = 8 W IDQ = 200 mA POUT = 8 W IDQ = 200 mA POUT = 8W f = 500MHz f = 500MHz f = 500MHz f = 500MHz Min. 8 15 50 20:1 Typ. Max. Unit W dB % VSW R
All Phase Angles
Table 5.
ESD protection characteristics
Test conditions Human body model Machine model Class 2 M3
Table 6.
Moisture sensitivity level
Test methodology J-STD-020B Rating MSL 3
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PD54008L-E
Impedances
2
Figure 1.
Impedances
Impedance data schematic
D
ZDL
Typical Input Impedance
Typical Drain Load Impedance
G Zin
S
SC13140
Table 7.
f
Impedance data (1)
ZIN () 1.12 - j 2.02 1.3 - j 2.01 1.66 - j 2.55 ZDL () 2.01 + j 0.13 1.84 + j 0.7 1.66 + j 1.51
480MHz 500MHz 520MHz
1. In Broadband amplifier
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Typical performance
PD54008L-E
3
Typical performance
Power gain vs output power Figure 3.
80
Figure 2.
20 19 18 17
Efficiency vs output power
Idq = 200 mA
70 60
Idq = 150 mA 16 Gp (dB) 15 14 13 12 11 10 0 1 2 3 4 5 Pout (W) 6 7 8 9 10 f = 500 MHz Vds = 7.5 V
Nd (%)
50 40 30 20 10 0 0 1 2 3 4 5 Pout (W) 6 7 8 9 10 Idq = 200 mA f = 500 MHz Vds = 7.5 V
Idq = 100 mA
Figure 4.
0
Return loss vs output power
Figure 5.
1000
Capacitance vs supply voltage
f = 1 MHz
-5
-10 RL (dB)
100 C (pF)
Ciss Coss
-15
-20 Idq = 200 mA f = 500 MHz Vds = 7.5 V
10 Crss
-25
-30 0 1 2 3 4 5 Pout (W) 6 7 8 9 10
1 0 1 2 3 4 5 Vds (V) 6 7 8 9
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PD54008L-E
Typical performance
3.1
14 12 10 8 6 4 2
Typical performance (Broadband)
Power gain vs frequency Figure 7.
70 60
Figure 6.
Efficiency vs frequency
50 40
Gp (dB)
Nd (%)
30 20
10
Idq = 150 mA Pin = 26 dBm 0 470 480 490 500 f (MHz) 510 520 530
0 470 480 490 500 f (MHz) 510
Idq = 150 mA Pin = 26 dBm 520 530
Figure 8.
0
Return loss vs frequency
-4
-8 RL (dB) -12 -16 Idq = 150 mA Pin = 26 dBm -20 470 480 490 500 f (MHz) 510 520 530
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Test circuit schematic
PD54008L-E
4
Figure 9.
Test circuit schematic
Internal schematic
Table 8.
Test circuit component part list
Description Ferrite bead 300 pF, 100 mil ATC 1 -:- 20 pF Trimmer cap - JOHANSON 0.8 -:- 10 pF Trimmer cap - JOHANSON 36 pF, 100 mil ATC 51 pF, 100 mil ATC 62 pF, 100 mil ATC 150 pF, 100 mil CHIP CAP 1 nF, 100 mil CHIP CAP 1000 pF, 100 mil CHIP CAP 0.1 nF, 100 mil CHIP CAP 10 F 50 V Electrolytic Capacitor 15 pF, 100 mil ATC 43nH, Coilcraft 33 K, 1W CHIP Resistor 1 K, 1W CHIP Resistor 15 , 1W CHIP Resistor 0.49" X 0.080" MICROSTRIP 1.024" X 0.080" MICROSTRIP 0.079" X 0.080" MICROSTRIP 0.24" X 0.223" MICROSTRIP
Component B1, B2 C1, C16 C2, C3, C4, C13,C14 C15 C5 C6 C7 C8, C17 C9 C10, C18 C11, C19 C12, C20 C21 L R1 R3 R4 Z1 Z2 Z3 Z4 Z5
0.079" X 0.223" MICROSTRIP
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PD54008L-E
Table 8. Test circuit component part list
Z6 Z7 Z8 Z9 Z10 Z11 N1, N2 Board 0.138" X 0.223" MICROSTRIP 0.259" X 0.223" MICROSTRIP 0.079" X 0.080" MICROSTRIP 0.413" X 0.080" MICROSTRIP 0.756" X 0.080" MICROSTRIP 0.61" X 0.080" MICROSTRIP Type N Flange Mount
Test circuit schematic
ROGER, ULTRA LAM 2000 THK 0.030", r = 2.55 2oz. ED cu SIDES
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Package mechanical data
PD54008L-E
5
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
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PD54008L-E
Table 9.
Dim. Min. A A1 A3 AA b c D d E E2 e f g h 2.49 0.15 0.43 0.64 Typ. 0.90 0.02 0.24 0.25 0.51 0.71 5.00 0.30 5.00 2.57 1.27 3.37 0.74 0.21 2.64 0.098 0.35 0.58 0.79 0.006 0.017 0.025 Max. 1.00 0.05 Min.
Package mechanical data
PowerFLATTM mechanical data
mm inch Typ. 0.035 0.001 0.009 0.01 0.020 0.028 0.197 0.011 0.197 0.101 0.050 0.132 0.03 0.008 0.104 0.014 0.023 0.031 Max. 0.039 0.002
Figure 10. PowerFLATTM package dimensions
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Package mechanical data
PD54008L-E
Table 10.
DIM.
PowerFLATTM tape & reel dimensions
mm. Min. Typ 5.25 5.25 1.1 Max. 5.35 5.35 1.2
Ao Bo Ko
5.15 5.15 1.0
Figure 11. PowerFLATTM tape & reel
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PD54008L-E
Table 11. Recommended footprint
Package mechanical data
13/15
Revision history
PD54008L-E
6
Revision history
Table 12.
Date 19-Jan-2006 23-Jan-2007
Revision history
Revision 1 2 First Issue Document has been reformatted Changes
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PD54008L-E
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